PRODUCT SPOTLIGHT · NXP
P3B1602DP: connecting buses across voltage domains
NXP's P3B1602DP combines a 2-bit I3C bus buffer, automatic direction sensing and bidirectional voltage-level translation. It targets mixed-voltage serial interfaces, including I3C, I²C and SMBus. See the official product page.
Key specifications
- VCCA: 0.72–1.98 V; VCCB: 1.08–3.63 V. VCCA must not exceed VCCB during operation.
- Maximum frequency: 12.5 MHz push-pull or 3.4 MHz open-drain.
- Capacitive loads up to approximately 100 pF.
- TSSOP8 package; ambient operating range −40 to +125°C.
Figures are based on the NXP data sheet, Rev. 2.0, September 9, 2026. Consult the document for operating conditions.
Design considerations
NXP identifies servers as an application. Designs with different supply domains, larger bus loads or longer PCB traces can evaluate this device against their topology and timing requirements. Its extended one-shot pulse supports larger capacitive loads.
Clock stretching is not supported. Verify protocol compatibility and signal integrity before adoption. Confirm the complete orderable number and packing requirements; the data sheet lists P3B1602DPJ.
The P3B1602-EVB evaluation board provides selectable loads for validation. NXP currently labels its board page as preproduction; check the latest status before ordering.
Send your complete part number, quantity and delivery requirements. Availability, pricing and lead times are confirmed in our quotation.
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